This invention relates to bipolar transistors and methods for fabricating bipolar transistors, and, more particularly, to bipolar transistors with low base resistances formed on complementary metal-oxide-semiconductor (CMOS) integrated circuits.
Integrated circuits based on complementary metal-oxide-semiconductor (CMOS) transistors contain complementary n-channel and p-channel metal-oxide-semiconductor (MOS) field-effect transistors. CMOS technology allows circuits to be formed that exhibit low power consumption and high levels of integration.
It is sometimes desirable to form another type of transistor——called the bipolar junction transistor (BJT) on the same silicon substrate as the MOS transistors in a CMOS integrated circuit. Bipolar junction transistors can be used to form circuits that are difficult or impractical to form using MOS transistors.
Fabricating both bipolar transistors and MOS transistors as part of the same integrated circuit is challenging and the bipolar transistors that result generally do not exhibit optimal performance. One obstacle to forming high-performance bipolar transistors on CMOS integrated circuits relates to the presence of an oxide layer that is used in the gates of the MOS transistors.
The MOS transistors in CMOS circuits have three electrodes—a source, a drain, and a gate. Signals pass between the source and drain under the control of signals applied to the gate. The gate of an MOS transistor has a gate conductor that is separated from an underlying silicon channel region by a thin gate oxide. The gate oxide is an insulator and does not conduct current.
Bipolar transistors also have three electrodes—an emitter, a collector, and a base. The emitter and collector of a bipolar transistor are roughly analogous to the source and drain in an MOS transistor. A bipolar base is analogous to an MOS gate.
It is generally desirable to form bipolar transistors and MOS transistors that have small lateral dimensions (i.e., small base widths and small gate lengths). With conventional approaches for forming. bipolar transistors on CMOS circuits, these small lateral dimensions are defined by forming narrow polysilicon lines over a thin gate oxide layer.
These conventional approaches result in CMOS devices that are optimal, but bipolar devices that have undesirably high base resistances. In the CMOS portion of the circuit, the narrow polysilicon lines are used as gate conductors. The thin oxide under each polysilicon line is used as the gate oxide. In the bipolar portion of the circuit, the narrow polysilicon lines help to define the bases during fabrication. However, the underlying gate oxide blocks access to the silicon of the base, which makes it difficult to form a low-resistance connection. High base resistances cause bipolar performance to suffer.
It is an object of the present invention to provide bipolar transistors with low base resistances on CMOS integrated circuits.